Fine processing techniques have been developed in accordance with high integration and high performance of semiconductor integrated circuits (abbreviated as LSIs hereinafter) in recent years. A chemical mechanical polishing (hereinafter, CMP) process is one of them and is a technique that is used often in the LSI manufacturing process, particularly in the planarization of interlayer dielectrics, formation of metal plugs, and formation of buried wirings in a multilayer wiring formation process. The technique is, for example, disclosed in U.S. Pat. No. 4,944,836.
Uses of copper and copper alloys as conductive substances to be wiring materials have been attempted in recent years in order to attain high performance of LSIs. It, however, is difficult for copper or copper alloy (henceforth, sometimes referred to simply as copper based metal) to be finely processed by dry etching that have often been used in conventional formation of aluminum alloy wiring.
Accordingly, a Damascene process, in which a thin film of wiring metal such as a copper based metal is deposited on an insulating film having grooves so that the grooves may be buried therewith and then the thin film is removed by CMP at areas except for those buried in the grooves to form embedded wiring, has been mainly employed. This technique is disclosed in Japanese Patent Application Laid-Open No. 2-278822, for example.
A conventional method of CMP of metal for polishing the aforementioned copper based metal comprises the steps of bonding a polishing pad to a circular polishing platen, pressing the surface of a substrate with a metal film formed thereon onto the surface of the polishing pad while the polishing pad surface is impregnated with a polishing liquid for metal film, rotating the polishing platen while a prescribed pressure (hereinafter, referred to as a polishing pressure) is applied from the back face of the polishing pad, and removing the metal film on projections by relative mechanical friction between the polishing liquid and the projections of the metal film.
A polishing liquid for metal film to be used for CMP generally contains an oxidizer, polishing particles and water. An oxidized metal dissolving agent and a metal anticorrosive agent are further added thereto, according to necessity. In a presumptive basic mechanism, a surface of metal film is oxidized first with an oxidizer to form an oxidized layer and then the oxidized layer is scraped with polishing particles. Since the oxide layer on the surface of the metal film in a depression seldom comes into contact with the polishing pad and therefore is not subjected to the effect of scraping with the polishing particles, the oxidized layer of the metal film on the projection is removed with the advance of CMP and the surface of the substrate is planarized. The details of this mechanism are disclosed in Journal of Electrochemical Society, 1991, Vol. 138, No. 11, pp. 3460-3464.
It has been known that addition of an oxidized metal dissolving agent to a polishing liquid for metal film is effective as a method for increasing the polishing rate by CMP. It is interpreted that this is because the scraping effect with the polishing particles is enhanced by dissolving particles of the metal oxide scraped with the polishing particles into the polishing liquid (this process is referred to as “etching”).
However, the oxidized layer of the surface of the metal film in a depression may also be etched. Therefore, repetition of a process that the oxidized layer on the surface of the metal film in a depression is etched and the metal film surface exposed is further oxidized with the oxidizer allows etching of the metal film in the depression to advance. That is, there is a fear that the planarizing effect is impaired. In order to prevent such excessive etching of a depression, a metal anticorrosive agent is further added to a polishing liquid for metal film.
However, the buried wiring formation by the conventional CMP result in problems, such as (1) occurrence of a phenomenon that a central portion of the surface of buried wiring metal is corroded isotropically to depress like a dish (dishing), and occurrence of a phenomenon that a dielectric is also polished in a portion high in wiring density, so that the thickness of the wiring metal decreases (erosion or thinning), (2) development of polishing scratches, (3) that the washing process for removing a polishing dust remaining on the substrate surface after polishing is troublesome; (4) cost rising caused by waste liquid treatment, and (5) corrosion of metal.
In order to inhibit the dishing from occurring or a copper based metal from corroding during the polishing, and to form highly reliable LSI wirings, a method of using a polishing liquid for metal which contains an oxidized metal dissolving agent composed of amino acetic acid, e.g., glycine, or amidosulfuric acid, and benzotriazole has been proposed. This technique is disclosed in, e.g., Japanese Patent Application Laid-open No. 8-83780.
In FIG. 1, wiring formation by a common Damascene process is depicted in a schematic cross-sectional diagram. FIG. 1(a) illustrates a state before polishing, including interlayer dielectrics 1 having grooved formed on the surface, barrier layer 2 formed so that it may follow surface irregularities of the interlayer dielectrics 1, and wiring metal 3 of copper or copper alloy deposited so that the irregularities may be buried.
First, as depicted in FIG. 1(b), wiring metal 3 is polished with a polishing liquid for wiring metal polishing until barrier layer 2 becomes exposed. Next, as depicted in FIG. 1(c), polishing is performed with a polishing liquid for barrier layer 2 until a projection of interlayer dielectrics 1 becomes exposed. At this time, an operation of polishing the interlayer dielectrics excessively, i.e., so-called overpolishing, may be performed. Moreover, there also is a step of polishing with a single polishing liquid from the state of FIG. 1(a) through the state of FIG. 1(c).
As described above, while various CMP polishing liquids have been disclosed, it is common that polishing is performed in one step in the step of polishing wiring metal. Moreover, as to the polishing pressure, it has been common that polishing is performed under a relatively high pressure, for example, a pressure of 3 psi or more, in order to increase the throughput by polishing at a high rate.
A unit of pressure “psi” is pound per square inch and it is not an SI unit. However, since it is generally used in the semiconductor industry, the “psi” is used also in this specification. It is noted that 1 psi is a pressure equivalent to about 6.89 kPa and is sometimes expressed as about 7 kPa 1 psi may be set to about 7 kPa for the purpose of simplification.
Incidentally, the influence of signal delay of wiring metal has recently been becoming disregardable as the wiring width becomes smaller every year. Then, a technology of using an interlayer dielectric with a small dielectric constant is being researched in order to reduce the signal time. However, since such interlayer dielectrics are generally low in mechanical strength, layered film structures including such interlayer dielectrics are also low in mechanical strength. For this reason, there was a problem that wiring defects are caused easily by, for example, peeling in a laminated film interface due to polishing stress generated during a CMP process.
In order to improve the above-mentioned problem, a method that wiring metal is polished in two stages as shown in FIG. 2 is starting to be used, and it seems to have become the mainstream since around 2005. This method has first-stage polishing for roughly scraping wiring metal first from the state of FIG. 2(a) to the state of FIG. 2(a) where a little wiring metal remains, and second-stage polishing for finish polishing from the state of FIG. 2(b) to the step of FIG. 2(c) where barrier metal becomes substantially exposed.
In the first-stage polishing, polishing is performed under a relatively high pressure (e.g., 2-3 psi) for high-rate polishing and in the second-stage polishing, polishing is performed under a low pressure in order to minimize the influence to an interlayer dielectric. The polishing pressure used in the second stage is usually adjusted to a pressure of 1.5 to 2 psi.